Intel has reportedly resolved the critical manufacturing defects that plagued its 1.8nm chip production process, known as Intel 18A, according to a recent report from BlueFin Research Partners. The resolution of these yield issues marks a shift for the company, which now aims to move the technology into full-scale commercial manufacturing for upcoming processors including Panther Lake and Clearwater Forest.
Why Intel 18A Yields Matter for Future Production
For years, Intel’s progress in advanced node scaling has been inconsistent. The company struggled with its 10nm process for years and faced significant delays in implementing 7nm, 4nm, and 3nm technologies. According to BlueFin Research Partners, the recent improvements in 18A yield mean the process is now economically viable for mass production.
This is essential for Intel’s business model. The company needs to attract external foundry clients to justify the immense capital expenditure required for its fabrication plants. Reports indicate that Apple is evaluating the 18A process for potential use in future M7 chips, placing pressure on Intel to maintain consistent yields to secure such high-profile partnerships.
The Role of PowerVia in Manufacturing Challenges
The primary source of Intel’s 18A production hurdles was the transition to "wafer-to-wafer" manufacturing, specifically involving the PowerVia technology, also known as Backside Power Delivery.

Unlike traditional chips where power and signal lines share space above the transistors, PowerVia separates them. It moves power delivery to the underside of the silicon wafer. As detailed by Intel, this requires the wafer to be turned over and thinned to expose vertical conductors (Through-Silicon Vias) that were etched from the front side.
This process requires bonding the wafer to a secondary carrier wafer to prevent structural failure during thinning. According to industry analysis, the complexity of this bonding process was the root cause of the defects that delayed products like the Panther Lake processor.
PowerVia allows for higher transistor density and improved performance by using a classic layer for logical signals with power conductors removed, which clears the top side of the chip for signal routing and de-clutters the metallic layers.
How Intel Plans to Scale Capacity
Intel is currently scaling its 18A production across two major facilities: Fab 52 in Arizona and the D1X facility in Oregon. BlueFin Research Partners reports that each site is targeting a capacity of thousands of wafers per month.
When fully operational, this brings Intel’s total 1.8nm capacity to approximately 24 to 30 thousand wafers per month. While this represents a significant ramp-up for Intel, it remains smaller than the competition; for comparison, TSMC expects its 3nm capacity to reach hundreds of thousands of wafers per month by the end of 2026.
Remaining Hurdles: Frequency Deficits
While yield defects have been largely mitigated, the 18A process still faces challenges regarding clock speeds. Comparative data shows that Intel’s Panther Lake chips are currently capped at approximately 5.1 GHz, significantly lower than the 5.7 GHz speeds achieved by Arrow Lake processors manufactured on TSMC’s 3nm process.

Industry analysts suggest that the 600–700 MHz gap is likely a limitation of the 18A process itself rather than the chip architecture. To address this, Intel is developing an "18A-P" variant, which aims to improve performance and close the frequency gap. According to BlueFin Research Partners, risk production for the 18A-P process has already commenced at the D1X facility.
Frequently Asked Questions
What is the status of Intel 18A production?
According to BlueFin Research Partners, Intel has largely resolved the yield issues that previously hampered the 1.8nm process, making it ready for mass production.
What is PowerVia technology?
PowerVia is Intel’s implementation of Backside Power Delivery. It moves power supply lines to the back of the silicon wafer, allowing for higher performance and density on the front side of the chip.
How does Intel’s production capacity compare to competitors?
Intel is targeting 24 to 30 thousand wafers per month for its 18A process. This is currently significantly lower than TSMC’s projected capacity of hundreds of thousands of wafers per month for its 3nm process by late 2026.
Are there still problems with the 18A process?
Yes, the process currently shows a frequency deficit compared to TSMC’s 3nm technology. Intel is working on an upgraded "18A-P" version of the process to improve clock speeds.
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